Computer Architecture: A Quantitative Approach

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Elsevier, 2011/10/07 - 856 ページ

Computer Architecture: A Quantitative Approach, Fifth Edition, explores the ways that software and technology in the cloud are accessed by digital media, such as cell phones, computers, tablets, and other mobile devices. The book, which became a part of Intel's 2012 recommended reading list for developers, covers the revolution of mobile computing. It also highlights the two most important factors in architecture today: parallelism and memory hierarchy.

This fully updated edition is comprised of six chapters that follow a consistent framework: explanation of the ideas in each chapter; a crosscutting issues section, which presents how the concepts covered in one chapter connect with those given in other chapters; a putting it all together section that links these concepts by discussing how they are applied in real machine; and detailed examples of misunderstandings and architectural traps commonly encountered by developers and architects. Formulas for energy, static and dynamic power, integrated circuit costs, reliability, and availability are included. The book also covers virtual machines, SRAM and DRAM technologies, and new material on Flash memory. Other topics include the exploitation of instruction-level parallelism in high-performance processors, superscalar execution, dynamic scheduling and multithreading, vector architectures, multicore processors, and warehouse-scale computers (WSCs). There are updated case studies and completely new exercises. Additional reference appendices are available online.

This book will be a valuable reference for computer architects, programmers, application developers, compiler and system software developers, computer system designers and application developers.

  • Part of Intel's 2012 Recommended Reading List for Developers
  • Updated to cover the mobile computing revolution
  • Emphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms.
  • Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next")
  • Includes three review appendices in the printed text. Additional reference appendices are available online.
  • Includes updated Case Studies and completely new exercises.
 

ページのサンプル

目次

1 Fundamentals of Quantitative Design and Analysis
1
2 Memory Hierarchy Design
71
3 InstructionLevel Parallelism and Its Exploitation
147
4 DataLevel Parallelism in Vector SIMD and GPU Architectures
261
5 ThreadLevel Parallelism
343
6 WarehouseScale Computers to Exploit RequestLevel and DataLevel Parallelism
431
Appendix A Instruction Set Principles
A-1
Appendix B Review of Memory Hierarchy
B-1
Basic and Intermediate Concepts
C-1
References
R-1
Index
I-1
Translation between GPU terms in book and official NVIDIA and OpenCL terms
I-90
著作権

他の版 - すべて表示

Computer Architecture: A Quantitative Approach
John L. Hennessy,David A. Patterson,Krste Asanović
限定表示 - 2012

多く使われている語句

ADD.D addressing modes Appendix Assume average memory access bandwidth benchmarks bits branch buffer bytes cache block cache miss Chapter chip clock cycles clock rate coherence compiler Core i7 cost CUDA data cache dependences disk DRAM dynamic scheduling example execution fetch Figure floating-point functional units hardware hazards implementation increase instruction set instruction set architecture integer Intel Intel Core issue L2 cache latency load loop main memory MapReduce memory hierarchy MIPS miss penalty miss rate multicore multiple multiprocessor multithreading node operands operating system Opteron optimizations parallelism performance pipeline Power7 prediction predictor prefetch protocol reduce requires reservation station result RISC Section sequence servers set associative shared shows SIMD SIMD instructions SIMD Lane SIMD Processor speculation speedup stall superscalar Thread Block thread-level parallelism tion vector processor virtual memory workload write write-back

著者について (2011)

ACM named John L. Hennessy a recipient of the 2017 ACM A.M. Turing Award for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry. John L. Hennessy is a Professor of Electrical Engineering and Computer Science at Stanford University, where he has been a member of the faculty since 1977 and was, from 2000 to 2016, its tenth President. Prof. Hennessy is a Fellow of the IEEE and ACM; a member of the National Academy of Engineering, the National Academy of Science, and the American Philosophical Society; and a Fellow of the American Academy of Arts and Sciences. Among his many awards are the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and the 2000 John von Neumann Award, which he shared with David Patterson. He has also received seven honorary doctorates.

David Patterson is the Pardee Professor of Computer Science, Emeritus at the University of California at Berkeley, which he joined after graduating from UCLA in 1977.His teaching has been honored by the Distinguished Teaching Award from the University of California, the Karlstrom Award from ACM, and the Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Prof. Patterson received the IEEE Technical Achievement Award and the ACM Eckert-Mauchly Award for contributions to RISC, and he shared the IEEE Johnson Information Storage Award for contributions to RAID. He also shared the IEEE John von Neumann Medal and the C & C Prize with John Hennessy. Like his co-author, Prof. Patterson is a Fellow of the American Academy of Arts and Sciences, the Computer History Museum, ACM, and IEEE, and he was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He served on the Information Technology Advisory Committee to the U.S. President, as chair of the CS division in the Berkeley EECS department, as chair of the Computing Research Association, and as President of ACM. This record led to Distinguished Service Awards from ACM, CRA, and SIGARCH.

書誌情報

書籍名Computer Architecture: A Quantitative Approach
著者John L. Hennessy, David A. Patterson
版5, 改訂
出版社Elsevier, 2011
ISBN0123838738, 9780123838735
ページ数856 ページ
  
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